Opened on 07/15/20 at 15:36:19

Closed on 07/16/20 at 13:08:26

Last modified on 10/08/20 at 13:30:29

#4028 closed defect (fixed)

i386: SMP-System hangs with non-consecutive APIC IDs

Reported by: Jan Sommer Owned by: Jan Sommer <jan.sommer@…>
Priority: normal Milestone: 5.1
Component: arch/i386 Version: 5
Severity: normal Keywords:
Cc: Blocked By:
Blocking:

Description

If a processor enumerates its cores non-consecutively (e.g. 0,2,4,8 for a tested Intel Atom) the mapping to the per_CPU structures is not correct.

Change History (3)

comment:1 Changed on 07/15/20 at 15:44:29 by Jan Sommer

I just noticed its not the per_cpu structures which does not work, but the IPIs are sent to the wrong CPU, because of the wrong mapping.

I have a patch ready, but I experience an error when I try to attach a file to this ticket.

comment:2 Changed on 07/16/20 at 13:08:26 by Jan Sommer <jan.sommer@…>

Owner: set to Jan Sommer <jan.sommer@…>
Resolution: → fixed
Status: new → closed

In a1f9265c/rtems:

bsps/pc386: Fix IPI for non-consecutive APICIDs

  • properly use the cpu <-> apic maps for IPIs

Closes #4028.

comment:3 Changed on 10/08/20 at 13:30:29 by Joel Sherrill <joel@…>

In 560c08c/rtems:

bsps/include/bsp/fatal.h: Add GRLIB specific fatal error

updates #4028.

Note: See TracTickets for help on using tickets.